diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 5b744b2b5755..97c88f587615 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -206,8 +206,8 @@
opp-microvolt-L2 = <1050000 1050000 1150000>;
clock-latency-ns = <40000>;
};
-opp-1992000000 {
-opp-hz = /bits/ 64 <1992000000>;
+opp-2016000000 {
+opp-hz = /bits/ 64 <2016000000>;
opp-microvolt = <1150000 1150000 1150000>;
opp-microvolt-L0 = <1150000 1150000 1150000>;
opp-microvolt-L1 = <1100000 1100000 1150000>;
diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c
index 7da2c01c4444..a129cf95e4c1 100644
--- a/drivers/clk/clk-scmi.c
+++ b/drivers/clk/clk-scmi.c
@@ -69,6 +69,9 @@ static int scmi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
{
struct scmi_clk *clk = to_scmi_clk(hw);
+if ((clk->id == 0) && (rate == 2016000000))
+rate = 1992000000;
+
return clk->handle->clk_ops->rate_set(clk->handle, clk->id, rate);
}
@@ -129,6 +132,8 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk)
min_rate = sclk->info->range.min_rate;
max_rate = sclk->info->range.max_rate;
}
+if (sclk->id == 0)
+max_rate = 2016000000;
clk_hw_set_rate_range(&sclk->hw, min_rate, max_rate);
return ret;
--